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RECENT PUBLICATIONS
4-14-2026
How Hardware Runs Any Activation Function with Just a Tiny Lookup Table
White Paper
Medium
Digital Design
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4-14-2026
Clock Domain Crossing and Synchronizers (Part 2): Best Practices
White Paper
Electronic Design
ESW
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2-23-2026
Quality of Decap cells placement to avoid leakage power
White Paper
Medium
Digital Verification
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Stay informed with the latest insights and research in semiconductor technolgy
LATEST ARTICLES
04-14-2026
How Hardware Runs Any Activation Function with Just a Tiny Lookup Table
White Paper
Medium
Digital Design
Learn More
04-14-2026
Clock Domain Crossing and Synchronizers (Part 2): Best Practices
White Paper
Electronic Design
ESW
Learn More
02-23-2026
Quality of Decap cells placement to avoid leakage power
White Paper
Medium
Digital Verification
Learn More
02-18-2026
Nanoscale SCE: Electrostatic Challenges and FinFET/GAA Mitigation Solutions
White Paper
All About Circuits
Digital Design
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02-10-2026
Memory-Efficient TopK for ONNX with In-Place Heap Processing
White Paper
Medium
ESW
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01-26-2026
Clock Domain Crossing and Synchronizers Part 1: Metastability Modeling
White Paper
Electronic Design
ESW
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01-12-2025
Open-Source Hyperdimensional RISC-V Vector Processor with Radix-8 CORDIC-Based Nonlinear Encoding for Memory-Efficient Edge-AI
Conference paper
IEE
Digital Verification
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01-05-2026
The Next Wave of Intelligence: NPUs and the Rise of Edge AI
White Paper
Medium
Wireless
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01-01-2026
Specialized Hardware for AI: Why We Need Custom Chips
White Paper
Linkedin
ESW
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12-22-2025
AI For Cybersecurity
White Paper
Medium
ESW
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09-28-2025
Timekeepers: ML-Driven SDF Analysis for Power-Wasters Detection in FPGAs
White Paper
CASES
Digital Design
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10-14-2025
A Generic Agent Pattern for Reusable Testbenches
White Paper
DVCON Europe
Digital Verification
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12-4-2025
Edge AI: Bringing Intelligence to the Device
White Paper
Medium
ESW
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